documentation/terminology and specifications: Difference between revisions
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|PPMP | |PPMP | ||
| | |Pen and Palette Manipulation Processor. | ||
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|PIXC | |PIXC | ||
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|CCoB | |CCoB | ||
|(sometimes referred to as SCoB) | |CEL Control Block. (sometimes referred to as SCoB, Sprite Control Block) | ||
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|Clipping | |Clipping | ||
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|PIN | |PIN | ||
| | |Pen Index Number | ||
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|PIP | |PIP | ||
| | |Pen Index Palette | ||
|- | |- | ||
|Regis Filbin | |Regis Filbin | ||
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|RGB555 | |RGB555 | ||
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|- | |||
|VIRS | |||
|Vertical Interval Reference Signal | |||
|} | |} | ||
Latest revision as of 00:57, 14 August 2025
| Term | Description |
|---|---|
| ARM | Formerly “Advanced Risc Machines”. The designer of the CPU used in the 3DO Opera. |
| ARM60 | The ARM CPU used in the 3DO Opera. Retail system runs the CPU at 12.5Mhz (1/4th the main 50Mhz clock). |
| CEL | (Sometimes referred to as a “sprite”) |
| CEL Engine | |
| MADAM | |
| CLIO | |
| ANVIL | |
| AMY | |
| Expansion Interface | |
| PLUT | |
| CLUT | |
| DRAM | |
| VRAM | |
| NVRAM | |
| FENCE | |
| Opera | The code name for the original ARM based 3DO console hardware. |
| Portfolio | The name of the proprietary operating system used by the 3DO Opera and later 3DO M2 systems. |
| SlowBus | |
| SlipStream | |
| LRFORM | |
| Packed | |
| Coded | (also referred to as “normal”) |
| Uncoded | (also referred to as “linear”) |
| PPMP | Pen and Palette Manipulation Processor. |
| PIXC | |
| CCoB | CEL Control Block. (sometimes referred to as SCoB, Sprite Control Block) |
| Clipping | |
| DSP/DSPP | |
| DIPIR | |
| UNCLE | |
| REGIS | |
| DMA | |
| BPP | |
| CCARF | (also may be referred to as “SCARF”) |
| CFBD | |
| VDL | |
| DMANFW | |
| D-mode | |
| IPN | |
| IPS | |
| MUNKEE | |
| PIN | Pen Index Number |
| PIP | Pen Index Palette |
| Regis Filbin | |
| SPORT | |
| SVF | |
| SYSRAM | |
| M25M | The main system clock. 25Mhz. Coming from the main oscillator divided by 2. |
| Tick | 1 cycle of the main clock, M25M. |
| Vick | 1 period of the video clock, V25M. |
| V25M | The video clock. Nominally 24.5454Mhz. Twice the Pixel Clock. |
| Pixel Clock | Nominally 12.2727MHz. |
| MCLK | The CPU Master Clock of 12.5Mhz. |
| RGB444 | |
| RGB555 | |
| VIRS | Vertical Interval Reference Signal |